1. Field of the Invention
The present invention relates to a surge absorption circuit with improved high frequency characteristics.
2. Related Background of the Invention
Semiconductor devices such as IC and LSI are destroyed or degraded in characteristics by high voltage static electricity. As a countermeasure against the static electricity for the semiconductor device, a surge absorption element such as a varistor is used. The surge absorption element typically represented by a varistor has a stray capacitive component and a stray inductive component, therefore, if applied to a circuit dealing with a high speed signal, it degrades the signal.
FIG. 1 is a diagram showing a conventional surge absorption circuit to which a varistor is applied. A surge absorption circuit 200 shown in FIG. 1 has an input/output terminal 201, a common terminal 202 and a varistor 203. When an input signal with a small amplitude is input to the input/output terminal 201, the varistor 203 remains highly resistive and does not give influence on the input signal. On the other hand, when a high voltage surge enters the input/output terminal 201, the high voltage surge is forced to pass through the varistor 203 to the common terminal 202. As a result, if the surge absorption circuit 200 shown in FIG. 1 is connected to the input/output terminal of a semiconductor device, the semiconductor device is protected from a high voltage surge.
FIG. 2 is a diagram showing an equivalent circuit of a varistor. As shown in FIG. 2, a varistor can be expressed equivalently by a variable resistor 204 and a stray capacitance 205, provided in parallel between one terminal and the other terminal. The resistance value of the variable resistor 204 is large in general, and becomes small when a high voltage surge is applied, therefore, it is possible for a varistor to protect a semiconductor device from a high voltage surge. However, since there exists the stray capacitance 205, a varistor attached to the input/output side of a semiconductor device dealing with a high speed signal may be a cause of degradation of the high speed signal.
FIG. 3 is a diagram showing the calculation result of S parameters S11 and S21 of the surge absorption circuit expressed by the equivalent circuit shown in FIG. 2. FIG. 3 shows the S parameters S11 and S21 when the capacitance Cz of the stray capacitance is 1 pF, 3 pF, and 5 pF, respectively. When the stray capacitance is 5 pF, S21 begins to degrade when the frequency of a signal exceeds 100 MHz and it is no longer possible to transmit the signal. In addition, S11 also becomes large and the reflection characteristic degrades. Even when the stray capacitance is 1 pF, the same result occurs when the frequency of the signal exceeds 1 GHz. Since the stray capacitance has a tradeoff relationship to a clamping voltage and an energy durability, there has been a problem that a surge absorption element having excellent characteristic cannot be applied to the use of a high speed signal.
FIG. 4 is a diagram showing the TDR (Time Domain Reflectmetry) test result of a conventional surge absorption circuit. FIG. 4 shows TDR when the capacitance Cz of the stray capacitance is 1 pF, 3 pF, and 5 pF, respectively. An input impedance Zi for a pulse signal whose rise time and fall time are 200 ps and signal amplitude is 1 V0-p degrades to about 40 Ω when the stray capacitance is 5 pF while it is 100 Ω in the steady state. Even when the stray capacitance is 1 pF, the input impedance degrades to 80 Ω.
As described above, when a surge absorption circuit is applied to a circuit dealing with a high speed signal, it is necessary to reduce the stray capacitive component to avoid degradation in the rise characteristic and delay characteristic of a high speed signal. On the other hand, if the stray capacitive component of a surge absorption element is reduced, the clamping voltage of the surge absorption element is raised and the energy durability is reduced.
A surge absorption circuit that reduces the influence of the stray capacitive component has already been proposed. For example, by combining an inductive element and a surge absorption element, it is possible to attain impedance matching of the surge absorption circuit. FIG. 5 is a diagram showing an example of a conventional surge absorption circuit that combines two inductive elements with a varistor. In a surge absorption circuit 210 shown in FIG. 5, a series circuit in which two inductive elements 214 and 215 are connected in series is provided between an input terminal 211 and an output terminal 212 and a varistor 216 is connected between the middle point of the series circuit and a common terminal 213.
FIG. 6 is a diagram showing an example of a conventional surge absorption circuit in which an inductive element is combined with two varistors. In a surge absorption circuit 220 shown in FIG. 6, a parallel circuit having a varistor 224 and an inductive element 225 is connected to a varistor 223 in series between an input/output terminal 221 and a common terminal 222. Such a surge absorption circuit is disclosed in, for example, Japanese Patent Application Laid-open No. 2001-60838.